About

Muralidhara Ramalingaiah is an accomplished Engineering Manager with over 19 years of experience in leading, managing, and building Design and Verification teams. He is currently working at Intel as an Engineering Manager, where he is responsible for the design and verification of Compute Express Link (CXL) based cache coherent Host/devices, Configurable RF transceiver SOC verification for 4G/5G protocol, and IOT related SOC/ASIC Verification using UVM. Prior to joining Intel, Muralidhara has worked with Mediatek as a Staff Engineer, where he was responsible for UVM based verification for Data Center Ethernet Switches. He has also worked with Nvidia as a Senior ASIC Design Engineer, where he led the verification for Mipi-CSI3/CSI2 host verification, UVM based test-bench architecture, and verification/testplan. Muralidhara has also filed a US Patent on "Filtering Excessive Image Data in Cameras" with serial number 14056215 during his tenure at Nvidia. Muralidhara holds a BE degree in Electrical from Bangalore University and a Master of Technology (MTech) degree in VLSI Design and Embedded Systems from Vishveshwaraiah Technological University. He is a Senior Software Engineer with expertise in testing and has relevant experience of 18.45 years. Muralidhara's exceptional leadership skills, technical expertise, and proficiency in UVM based verification make him a valuable asset to any organization. He is a dedicated and result-oriented professional who is always striving for excellence and has a proven track record of delivering high-quality results.