About

Pawan Sharma is a highly skilled Senior Principal Software Engineer with over 15 years of experience in software development. He has a strong background in C++, data structures, algorithms, QT(GUI), multi-threading, shell-scripting, Python, and OpenAccess. Pawan has a deep understanding of EDA Domain, including pin placement, IO placement, block placement, power-estimation, and tech-mapper. Pawan has a proven track record of success, having won a Gold Medalist in C++ Skills contest held at Cadence Worldwide. He has worked on three products and built one from scratch. Pawan has improved performance 5x-100x in multiple features by changing data-structure, algorithm, or programming language. He has received many awards from customer-account teams and senior management. Currently, Pawan works at Cadence Design Systems as a Senior Principal Software Engineer. He is part of the Virtuoso-Physical Design Group and the Virtuoso Floorplanner team. Pawan has experience in abstract generation for routers, pin placement, IO-placer, and other floorplanning commands. Prior to Cadence, Pawan worked at Xilinx as a Tech Lead in the IP Tools and Software group (SOC->RTL). He also worked at Atrenta as a Project Lead. Pawan holds a B.E. in Computer Engineering and Computer Science from NSIT (Delhi University Govt Engg College). He also attended Govt Model School Vivek Vihar. Pawan's technical expertise includes software engineering, Python, and senior software engineering. With over 22.61 years of relevant experience, Pawan is a highly skilled and accomplished software engineer.