About

Raiyyan Masumdar is a Design Verification Engineer with a professional background in ASIC Design Verification and multifaceted education background in ASIC/FPGA Development, Image Processing, and Digital Communications. Currently, he works as a Member of Technical Staff, Design Verification Engineer at Analog Devices. Raiyyan has over 5.5 years of relevant experience in the field of ASIC Design Verification. He has previously worked as a Design Verification Engineer at Intel, where he was responsible for developing and modifying an OVM based test bench for the constrained random verification of a sub-IP of a SIMD based multicore high-performance computing platform. He has also shouldered the responsibility of developing test cases and corresponding stimuli to meet the project target in both quality and schedule. Raiyyan has contributed to the development of a scoreboard using System Verilog/C++ and written covergroups and analyzed functional coverage reports for a PCIe based proprietary sub-IP that included packet transfers to and from a processing element. He has worked closely with RTL designers to develop comprehensive test plans based on specifications to catch possible RTL bugs. Raiyyan has also developed Perl scripts to enhance the automation and efficiency of the verification flow and verified the functionality of the design with respect to the power intent described using UPF 2.0 standard. Raiyyan has also worked as a Graduate Research Assistant at California State University Northridge, where he developed a novel image processing algorithm in segmentation of white cells and red cells from the blood smear images and counting them. The technique used for segmentation purposes was K-means clusterization technique. Currently, he is trying to modify the algorithm into a self-adaptive one by making use of histogram analysis of the image. The counting of blood cells was done using the Circular Hough Transform technique and some morphological operations to process the image. Raiyyan has a Master of Science degree in Electrical Engineering with a specialization in Digital Hardware Design from California State University Northridge. He also holds a PG Diploma in Advanced VLSI Design and Verification from Maven Silicon and a Short Term Diploma Course on VLSI Designing from Front End VLSI Designing. Raiyyan has a Bachelor of Engineering degree in Electrical, Electronics, and Communications Engineering from KJ Somaiya College of Engineering. In addition to his technical skills, Raiyyan is a software engineer, a researcher, and has experience in ECS. He is proficient in Image Processing and has a strong understanding of ASIC/FPGA Development