590+ Embedded Systems & VLSI Jobs in Bangalore

Role and Responsibilities Should have strong PV knowledge, hands on experience of using Calibre, Fusion Compiler, Innovus.Good communication, scripting and debugging skills.Be able to execute PV…

Role and Responsibilities Learn on SEC UVM. Understand Top DV builds for different flavors with power, netlist, GLS, RTL, and power net builds.Work closely with block DV, Top design, PI/PD, DFT teams…

Role and Responsibilities Modem BUS interconnect verificationSkill Requirements: AMBA protocol knowledge Good to have: Python/Perl scripting, understanding of UPF, performance Verification…

Role and Responsibilities Responsible for developing testcases for SoC level verification scenarios.Execute Gate level simulations. Responsible for coverage closure Skill Requirements:Hands on…

Design Verification of Power Management Unit blocks of Modem Sub-system.Skill Requirements: SV, UVM, Basic digital design, Power knowledge, IESNLP understanding, GLS simulations

We are looking for an experienced SoC Verification Engineer to join our VLSI team. The candidate will be responsible for verification of complex SoC designs, ensuring functional correctness and…

Responsible for developing test cases for SoC level verification scenarios.Execute Gate level simulations. Responsible for coverage closureSkill Requirements: Good understanding on C and SV…

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• High Speed Digital Architecture Design (Microcontroller, Microprocessor and FPGA based architecture) with 1553 interface • System Design with Xilinx/Altera/Actel FPGA devices with relevant tools…

Perform Design Verification of Power Management Unit (PMU) blocks in the Modem Subsystem. Develop and execute SystemVerilog/UVM-based verification environments, testcases, and regression suites…

Strong understanding of constrained-random verification methodology. Experience in functional coverage and assertion-based verification (SVA).

Strong hands-on experience with Calibre , Fusion Compiler (FC) , and Innovus . Good understanding of Physical Verification methodologies and signoff flows.

2–5 years of experience in Design Verification/IP Verification. Knowledge of functional coverage, assertions (SVA), and constrained random verification . Experience with simulation tools such as…

ATPG – Pattern generation, ATPG netlist and timing sims, ATPG Coverage analysis and improvement with experience in MBIST pattern generation, simulations, and post-silicon pattern debug analysis…

Exp: 4+ years hands-on experience in ASIC/SoC Front-End Verification. Protocols: Strong working knowledge of AMBA CHI / AXI, PCIE gen 5 protocols and cache coherency concepts. Interface Domain…

We are looking for a skilled DFT Verification Engineer to join our VLSI design team. The ideal candidate will be responsible for verifying DFT logic including scan, BIST, JTAG, and boundary scan…

Role : Manage hierarchical blocks and pattern retargetting to top level, simulations debug and can think of different ways to improve coverage, scan insertion and post silicon bringup. • Good…

The role involves execution in the field of full custom layouts in cutting edge technology nodes. It will require a good layout electrical parameter knowledge along with quick learning capabilities…

We are seeking an experienced Static Timing Analysis (STA) Engineer with strong expertise in timing closure, timing sign-off, and synthesis for advanced technology nodes. The ideal candidate should…

Job Description: 5 to 7 years of experience in Subsystem/SoC verification and expertise in SystemVerilog (SV) and UVM based verification methodologies. Good understanding of verification concepts…